Template:Infobox soc/doc
< Template:Infobox soc
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{{Infobox soc | name = | image = | image_size = | alt = | caption = <!----------------- General -----------------> | soldby = [[:category: BRAND processors|BRAND]] | designfirm = | produced-start = [[:category: YEAR processors|MONTH YEAR]] | produced-end = | manuf1 = [[:category: LITHOGRAPHY nm processors|TSMC/Samsung ("LITH nm")]] | cpuid = <!----------- Specifications ------------> | transistors = | numcores = | cores1 = x [[:category:ARM Cortex-A78 processors|ARM Cortex-A78]] @ GHz | cores2 = x [[:category:ARM Cortex-A55 processors|ARM Cortex-A55]] @ GHz | gpu = | npu = | isp = | dsp = | co-processor = | ram = | storage = | modem1 = [[:category:5G processors|5G]] [[:category:4G processors|4G]] [[:category:Modemless processors|''n/a'']] <!----------------- Performance ------------------> | slowest = | fastest = | slow-unit = | fast-unit = | fsb-slowest = | fsb-fastest = | fsb-slow-unit = | fsb-fast-unit = | hypertransport-slowest = | hypertransport-fastest = | hypertransport-slow-unit = | hypertransport-fast-unit = | qpi-slowest = | qpi-fastest = | qpi-slow-unit = | qpi-fast-unit = | dmi-slowest = | dmi-fastest = | dmi-slow-unit = | dmi-fast-unit = | data-width = | address-width = | virtual-width = <!------- Architecture --------> | application = [[:category:Premium mobile processors|Premium mobile]] [[:category:Intermediate mobile processors|Intermediate mobile]] [[:category:Basic mobile processors|Basic mobile]] [[:category:Application processors|Application processors]] [[:category:Server processors|Server]] [[:category:PC & tablet processors|Personal computers]] [[:category:TV & media player processors|TV Media player processors]] | size-from = nm | size-to = | arch1 = ARM | microarch = | arch = ARMv8.2-A (64-bit) ARMv7-A (32-bit) | instructions = | extensions = <!-------------------- Cache ---------------------> | l1cache = | l2cache = | l3cache = | l4cache = | llcache = <!--------- Identification -----------> | pcode1 = <!-- pcode1..9 --> | model1 = <!-- model1..9 --> | market1 = <!-- market1..9 --> | variant = | core1 = <!-- core1..9 --> | pack1 = <!-- pack1..9 --> | sock1 = <!-- sock1..9 --> <!------------------ History -------------------> | predecessor = | successor = }} '''PROCESSOR NAME''' is a premium mobile processor from BRAND, announced in DATE]. == Devices == {{BRAND processors}} == References == <small> * [OFFICIAL SITE] <references /></small> [[category:YEAR processors]] [[category:BRAND processors]] [[category:LITHOGRAPHY nm processors]] [[category:ARM Cortex-A78 processors]] [[category:ARM Cortex-A55 processors]] [[category:Custom core processors]] [[category:5G processors]] [[category:4G processors]] [[category:3G processors]] [[category:Modemless processors]] [[category:Premium mobile processors]] [[category:Intermediate mobile processors]] [[category:Basic mobile processors]] [[category:Application processors]] [[category:Server processors]] [[category:PC & tablet processors]] [[category:TV & media player processors]]
Uso
{{Infobox soc | name = Processor name | image = An image to show in the infobox | image_size = Size of the image (defaults to 200px) | alt = Mouse over text for the image | caption = A caption for the image <!------------- General --------------> | soldby = Often, but not always, the same as the designfirm and/or manuf1 | produced-start = When production began / Launch date | produced-end = When production ended / Discontinued date | designfirm = Often, but not always, the same as manuf1 and/or soldby | manuf1 = (1..5) Common manufacturers of the device | cpuid = CPUID or PVR value <!---------- Specifications ----------> | transistors = Number of transistors, transistor count | numcores = Number of cores (2 for dual-core) | cores1 = Core(s) identification | gpu = Integrated GPU | npu = Integrated NPU | isp = Integrated ISP | dsp = Integrated DSP | co-processor = Co-processador integrado | ram = RAM | storage = Compatible storage stantandards | modem1 = (1..5) Compatible mobile networks <!----------- Performance ------------> | slowest = Lowest maximum CPU clock | fastest = Highest maximum CPU clock | slow-unit = Unit for slow speed. Default: GHz | fast-unit = Unit for fast speed. Default: GHz | fsb-slowest = Slowest FSB speed | fsb-fastest = Fastest FSB speed | fsb-slow-unit = Unit for slow speed. Default: MHz | fsb-fast-unit = Unit for fast speed. Default: MHz | hypertransport-slowest = Slowest HyperTransport speed | hypertransport-fastest = Fastest HyperTransport speed | hypertransport-slow-unit = Unit for slow speed. Default: GT/s | hypertransport-fast-unit = Unit for fast speed. Default: GT/s | qpi-slowest = Slowest QPI (QuickPath Interconnect) speed | qpi-fastest = Fastest QPI speed | qpi-slow-unit = Unit for slow speed. Default: GT/s | qpi-fast-unit = Unit for fast speed. Default: GT/s | dmi-slowest = Slowest DMI (Direct Media Interface) speed | dmi-fastest = Fastest DMI speed | dmi-slow-unit = Unit for slow speed. Default: GT/s | dmi-fast-unit = Unit for fast speed. Default: GT/s | data-width = Data bus width in bits | address-width = Address bus width in bits | virtual-width = Virtual address bus width in bits <!------- Architecture --------------> | application = Main usage (Embedded, Mobile, Desktop, Server) and segment (basic, intermediate, premium) | size-from = First fabrication size | size-to = Second fabrication size | arch1 = ARM, MIPS, x86, AMD64 | microarch = | arch = Instruction set architecture (ISA) that the CPU implements | instructions = Instruction sets (or number of instructions) | extensions = Extensions to the instructions <!----------- Cache -----------------> | l1cache = Level 1 cache size | l2cache = Level 2 cache size | l3cache = Level 3 cache size | l4cache = Level 4 cache size | llcache = Last Level cache size <!--------- Identification ----------> | pcode1 = (1..9) Product code names | model1 = (1..9) Model names | market1 = (1..9) Marketing names of the CPU | variant = Variants in the same family and generation | core1 = (1..9) Names of the cores | pack1 = (1..5) Names of CPU packages | sock1 = (1..9) Names of the sockets that the CPU was made for <!---------- History ----------------> | predecessor = What CPU came before | successor = What CPU came after }}
Examples
See also
- {{Infobox devices}}
- {{Infobox architecture}}